What distinguishes
us?
PinE Training Academy was established in 2014 ( PinE Training Academy is training division of Aujus Technology Private Limited (www.aujustechnology.com) ) by technocrats having expertise and vast work experience in the field of ASIC Design, FPGA, and DSP, ASIC Verification, real-time embedded system design and board PCB. It was started with a motive to impart through training expertise and know-how to students that can help them become a able solution provider.
Vision
To prepare dedicated team of Hardware and Software Engineers who are capable to take up project in Semiconductor Industries in fresher profile.
Mission
Train engineers in state of the art technology for ASIC, FPGA, Embedded, Verification & PCB domain reducing the gap of the requirements of the industry and skill resource available.
Meet our mentors

Vaibhava Mishra
Mentor @ ASIC Design Layout and FPGA

Apurv K Singh
Mentor @ ASIC Design Layout and FPGA

Raj Kumar
Mentor @ Embedded
Professional Training
AN ASIC (VLSI), EMBEDDED, FPGA, PCB AND VERIFICATION TRAINING ACADEMY.
Online Training
Why Online VLSI training with PinE (Programming in Electronics) training academy? Read More.
Online Training on Semiconductor Technologies for India and International Students.
Online Course | Start date | Register | Duration | Attendees |
---|---|---|---|---|
ASIC Verification | 1st August 2020 | Register | 6 Month | Pursuing/Professional |
Analog VLSI | 1st August 2020 | Register | 6 Month | Pursuing/Professional |
Digital Design | 1st August 2020 | Register | 6 Month | Pursuing/Professional |
RTL/FPGA EMBEDDED/FPGA DSP | 1st March 2021 | Register | 6 Month | Pursuing/Professional |
Scripting | 1st August 2020 | Register | 6 Month | Pursuing/Professional |
Standard Cell Layout Design | 1st August 2020 | Register | 6 Month | Pursuing/Professional |
STATIC TIMING ANALYSIS FOR ASIC DESIGN | 1st August 2020 | Register | 6 Month | Pursuing/Professional |
Offline Training
Class Room Training cum Offline Training for 2nd year, 3rd year and 4th year Engineering students and Pass out Engineering students on Semiconductor Technologies Read More.
Offline/Class Room Training | Start data | Location | Register | Weekend/Weekdays | Pass out/ Pursuing | Duration |
---|---|---|---|---|---|---|
Physical Design | 1st August 2020 | PinE COE | Register | Weekends | Pass out/Pursuing | 6 Month Weekends |
HDL, Embedded and DSP using FPGA | 1st March 2021 | Sector 62, Noida | Register | Weekdays/Weekends | Pursuing 4th Year/Pass out | 6 Month Regular |
ASIC Verification | 1st August 2020 | PinE COE | Register | Weekends | Pursuing 4th Year/Pass out | 10 Month Weekends |
ASIC Verification | 1st August 2020 | Sector 62, Noida | Register | Weekdays/Weekends | Pursuing 4th Year/Pass out | 6 Month Weekends |
ASIC Design and Layout/Memory Layout | 28th March 2020 | Sector 62, Noida | Register | Weekdays/Weekends | Pursuing 4th Year/Pass out | 6 Month Weekends |
HDL, Embedded and DSP using FPGA’s | 1st August 2020 | PinE COE | Register | Weekends | Pursuing 4th Year/Pass out | 10 Month weekends |
Embedded System & PCB Design | 1st August 2020 | PinE COE | Register | Weekends | Pursuing 4th Year/Pass out | 10 Month Weekends |
ASIC Design and Full Custom Layout | 1st August 2020 | PinE COE | Register | Weekends | Pursuing 4th Year/Pass out | 10 Month Weekends |
Hardware Design using Digital Gates, Verilog and Implementation on FPGA | 1st August 2020 | PinE COE | Register | Weekends | Pursuing 2nd//3rd Year | 10 Month Weekends/Weekdays |
DFT | 1st August 2020 | PinE COE | Register | Weekends | Pursuing 4th Year/Pass out | 10 Month Weekends |
Corporate Trainings
Class Room Training cum Offline Training for Working Professional /Faculties on Current Technologies in Semiconductor Industries Read More.
Offline/Class Room Training | Location | Register | Weekend/Weekdays |
---|---|---|---|
FPGA Architecture | PINE | Register | Weekends/Weekdays |
HDL Design - Verilog | PINE | Register | Weekends/Weekdays |
HDL Design – VHDL | PINE | Register | Weekends/Weekdays |
Designing with XILINX VIVADO/ISE | PINE | Register | Weekends/Weekdays |
Designing Microblaze /ZYNQ | PINE | Register | Weekends/Weekdays |
Designing with System Generator | PINE | Register | Weekends/Weekdays |
Embedded System Design | PINE | Register | Weekends/Weekdays |
Board Design | PINE | Register | Weekends/Weekdays |
Analog Design (Fundamental of Analog) | PINE | Register | Weekends/Weekdays |
Analog Layout | PINE | Register | Weekends/Weekdays |
Scripting (TCL/Perl) | PINE | Register | Weekends/Weekdays |
ASIC Verification | PINE | Register | Weekends/Weekdays |
Static Timing Analysis | PINE | Register | Weekends/Weekdays |
Summer/Winter School Training Program
6 Week Summer Training cum Project Based Internship for EC/EN & CS /IT (Optional) Engineering Students Read More.
Offline/Class Room Training | Start data | Location | Register | Weekend/Weekdays | Pursuing | Duration |
---|---|---|---|---|---|---|
HW Design using Logic Gates & Implementation on FPGA | 1st Jan 2020 | PinE COE | Register | Weekdays | Pursuing 2nd year | 6 Week Regular (5 days in week) |
Digital Design using Verilog and implementation on FPGA | 1st Jan 2020 | PinE COE | Register | Weekdays | Pursuing 3rd year | 6 Week Regular (5 days in week) |
Embedded System Design using 8 Bit & Interface | 1st Jan 2020 | PinE COE | Register | Weekdays | 3rd year Engineering Students | 2 days in week |